Firmware and Electronics Engineer - High Precision Timing Distribution

Are you a skilled Electronics Engineer with demonstrated experience in FPGAs and timing distribution techniques? Join CERN's Electronic Systems for Experiments group (ESE), to work in the High Precision Timing Distribution team.

The High Precision Timing Distribution (HPTD) project is dedicated to increasing the stability and precision of timing distribution networks in the HL-LHC experiments and beyond. The HPTD team investigates, develops and supports common solutions based on optical networks, FPGAs and other circuits (PLLs, CDRs, etc.) to distribute the accelerator's clock to tens of thousands of Front-End nodes in the particle detectors.

You will join:

• The EP Department, responsible for research in experimental particle physics, providing a stimulating scientific atmosphere and education and training for young scientists.
• The ESE Group, responsible for electronic systems for CERN experiments, including R&D, production, testing, installation, maintenance and support.
• The BE Section, responsible for designing and maintaining off-detector electronic systems with high-end FPGAs and precise timing distribution, including radiation-tolerant opto-electronic links.

Functions:

As a Firmware and Electronics Engineer you will:

• Study, implement and evaluate hardware and firmware solutions for high precision timing distribution (order of few picoseconds) for HL-LHC experiments.
• Investigate the use of White Rabbit technology for timing distribution from Back-End to Front-End electronics and asynchronous clock solutions.
• Design hardware, firmware, and software products optimizing timing distribution for High Energy Physics detectors.
• Keep up to date with state-of-the-art timing measurement methodologies.
• Perform targeted studies and characterization campaigns assisting experiments in technical timing choices.
• Provide guidance for system characterization and performance assessment.
• Support current and future timing distribution systems (TCLink, TTC-PON, GBTx/lpGBT FPGA IP cores, White Rabbit).
• Supervise students and graduates in these tasks.

Qualifications:

• Master's degree or PhD or equivalent experience in Electronics Engineering or related field.

Experience (required):

• Complex VHDL firmware development for FPGAs (including high-speed serial links >=10 Gb/s), verification tools, HDL simulation, timing and placement constraints.
• Use, implementation and characterization of timing-related circuits like PLLs and CDRs using laboratory instruments such as high-speed oscilloscopes and phase noise analyzers.
• Testing and characterization of electronic circuits based on FPGAs and high-speed serial links.
• Programming and scripting languages (Python), collaborative firmware development (Git).
• User support and documentation writing.
• Control theory principles.

Experience considered an asset:

• Schematic design of electronics modules with high-speed links, PCB layout issues, signal integrity knowledge.
• Supervision experience.

Technical competencies:

• Generation, processing, distribution, recovery of clock and timing signals.
• Design and simulation of FPGA-based electronics, firmware development in VHDL.
• Design and simulation of digital control loops and feedback systems.
• Programming techniques, particularly Python scripting and plotting.
• Testing analog and digital circuits with high-speed oscilloscopes and phase-noise analyzers.

Behavioral competencies:

• Learning and sharing knowledge; coaching others.
• Achieving results with rigor and quality.
• Solving complex problems creatively and collaboratively.
• Teamwork and fostering a positive atmosphere.
• Demonstrating flexibility and adaptability.

Language skills:

• Spoken and written English, commitment to learn French.

Work demands:

• May involve nights, Sundays, and official holidays as required.

Diversity commitment:

• CERN values diversity and welcomes applications from all member and associate states.